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Stress and Strain Engineering at Nanoscale in Semiconductor Devices
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Stress and Strain Engineering at Nanoscale in Semiconductor Devices

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Anticipating a limit to the continuous miniaturization (More-Moore), intense research efforts are being made to co-integrate various functionalities (More-than-Moore) in a single chip. Currently, strain engineering is the main technique used to enhance the performance of advanced semiconductor devices. Written from an engineering applications standpoint, this book encompasses broad areas of semiconductor devices involving the design, simulation, and analysis of Si, heterostructure silicongermanium (SiGe), and III-N compound semiconductor devices.

The book provides the background and physical insight needed to understand the new and future developments in the technology CAD (TCAD) design at the nanoscale. FeaturesCovers stressstrain engineering in semiconductor devices, such as FinFETs and III-V Nitride-based devicesIncludes comprehensive mobility model for strained substrates in global and local strain techniques and their implementation in device simulationsExplains the development of strain/stress relationships and their effects on the band structures of strained substratesUses design of experiments to find the optimum process conditionsIllustrates the use of TCAD for modeling strain-engineered FinFETs for DC and AC performance predictionsThis book is for graduate students and researchers studying solid-state devices and materials, microelectronics, systems and controls, power electronics, nanomaterials, and electronic materials and devices.

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定價:100 9000
若需訂購本書,請電洽客服 02-25006600[分機130、131]。

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