數據轉換器（原文影印版）（簡體書）

本書是第一本介紹數據轉換器的綜合性論述的研究生教材。內容從基礎到中級組織得很好，講的很全面，解得也很清楚，例子也很多，還有習題，非常適合剛入行的初學者。本書在對基礎理論原理進行必要的研究之後，覆蓋了許多細節並提供了深入和全面的知識要素。通過在每一章之後介紹的材料來加強主題的細微之處和詳細程度，並使用許多例子，其中大多數是計算機行為仿真的形式。這些例子和章末的習題，對理解和願意使用對訓練和設計活動有效的工具來做自我練習是有幫助的。《數據轉換器》對工程專業人士也是一本必不可少的教科書，因為它彌補了本專題論述方面的資料缺乏系統化、條理化的不足。本書假設讀者具有模擬和數字電路方面的扎實的基礎以及仿真工具、工作電路與行為分析的知識；具有統計分析的背景也是有幫助的，但不是絕對必要的。本書的突出特點包括：●覆蓋了所有的基本原理，使讀者能清晰地理解抽樣、量化、基於數據采樣系統中的噪音和基於數據采樣線性系統數學工具的實質； ●用於專用數據轉換器參數的綜合定義及對產品數據表的必要瞭解；●覆蓋了用於奈奎斯特率數據轉換器及其特徵的詳細研究、限制和設計技術的所有結構；●用仿真實例詳細研究過采樣和Sigma-Delta轉換器；使用譜和直方圖來清楚的理解特徵並是否噪聲整形的限制；●覆蓋增強性能的數字校正和校準技術；●使用理論和直觀的觀點以說明電路和系統的運行和限制；●覆蓋用於測試和表徵的測試方法和數據處理的描述；●在例子和習題集中廣泛使用Simulink和Matlab，以幫助讀者理解和願意做更深入的研究。

作者：（意大利）佛朗哥·馬洛博蒂（Franco Maloberti）

Dedication
Preface
1. BACKGROUND ELEMENTS
1.1 The Ideal Data Converter
1.2 Sampling
1.2.1 Undersampling
1.2.2 Sampling-time Jitter
1.3 Amplitude Quantization
1.3.1 Quantization Noise
1.3.2 Properties of the Quantization Noise
1.4 kT/C Noise
1.5 Discrete and Fast Fourier Transforms
1.5.1 Windowing
1.6 Coding Schemes
1.7 The D/A Converter
1.7.1 Ideal Reconstruction
1.7.2 Real Reconstruction
1.8 The Z-Transform
References

2. DATA CONVERTERS SPECIFICATIONS
2.1 Type of Converter
2.2 Conditions of Operation
2.3 Converter Specifications
2.3.1 General Features
2.4 Static Specifications
2.5 Dynamic Specifications
2.6 Digital and Switching Specifications
References

3. NYQUIST-RATE D/A CONVERTERS
3.1 Introduction
3.1.1 DAC Applications
3.1.2 Voltage and Current References
3.2 Types of Converters
3.3 Resistor based Architectures
3.3.1 Resistive Divider
3.3.2 X-Y Selection
3.3.3 Settling of the Output Voltage
3.3.4 Segmented Architectures
3.3.5 Effect of the Mismatch
3.3.6 Trimming and Calibration
3.3.7 Digital Potentiometer
3.3.8 R-2R Resistor Ladder DAC
3.3.9 Deglitching
3.4 Capacitor Based Architectures
3.4.1 Capacitive Divider DAC
3.4.2 Capacitive MDAC
3.4.3 Flip Around MDAC
3.4.4 Hybrid Capacitive-Resistive DACS
3.5 Current Source based Architectures
3.5.1 Basic Operation
3.5.2 Unity Current Generator
3.5.3 Random Mismatch with Unary Selection
3.5.4 Current Sources Selection
3.5.5 Current Switching and Segmentation
3.5.6 Switching of Current Sources
3.6 Other Architectures
References

4. NYQUIST RATE A/D CONVERTERS
4.1 Introduction
4.2 Timing Accuracy
4.2.1 Metastability error
4.3 Full-Flash Converters
4.3.1 Reference Voltages
4.3.2 Offset of Comparators
4.3.3 Offset Auto-zeroing
4.3.4 Practical Limits
4.4 Sub-Ranging and Two-Step Converters
4.4.1 Accuracy Requirements
4.4.2 Two-step Converter as a Non-linear Process
4.5 Folding and Interpolation
4.5.1 Double Folding
4.5.2 Interpolation
4.5.3 Use of Interpolation in Flash Converters
4.5.4 Use of Interpolation in Folding Architectures
4.5.5 Interpolation for Improving Linearity
4.6 Time-Interleaved Converters
4.6.1 Accuracy requirements
4.7 Successive Approximation Converter
4.7.1 Errors and Error Correction
4.7.2 Charge Redistribution
4.8 Pipeline Converters
4.8.1 Accuracy Requirements
4.8.2 Digital Correction
4.8.3 Dynamic Performances
4.8.4 Sampled-data Residue Generator
4.9 Other Architectures
4.9.1 Cyclic (or Algorithmic) Converter
4.9.2 Integrating Converter
4.9.3 Voltage-to-Frequency Converter
References

5. CIRCUITS FOR DATA CONVERTERS
5.1 Sample-and-Hold
5.2 Diode Bridge S&H
5.2.1 Diode Bridge Imperfections
5.2.2 Improved Diode Bridge
5.3 Switched Emitter Follower
5.3.1 Circuit Implementation
5.3.2 Complementary Bipolar S&H
5.4 Features of S& Hs with BJT
5.5 CMOS Sample-and-Hold
5.5.1 Clock Feed-through
5.5.2 Clock Feed-through Compensation
5.5.3 Two-stages OTA as T&H
5.5.4 Use of the Virtual Ground in CMOS S&H
5.5.5 Noise Analysis
5.6 CMOS Switch with Low Voltage Supply
5.6.1 Switch Bootstrapping
5.7 Folding Amplifiers
5.7.1 Current-Folding
5.7.2 Voltage Folding
5.8 Voltage-to-Current Converter
5.9 Clock Generation
References

6. OVERSAMPLING AND LOW ORDER EA MODULATORS
6.1 Introduction
6.1.1 Delta and Sigma-Delta Modulation
6.2 Noise Shaping
6.3 First Order Modulator
6.3.1 Intuitive Views
6.3.2 Use of 1-bit Quantization
6.4 Second Order Modulator
6.5 Circuit Design Issues
6.5.1 Offset
6.5.2 Finite Op-Amp Gain
6.5.3 Finite Op-Amp Bandwidth
6.5.4 Finite Op-Amp Slew-Rate
6.5.5 ADC Non-ideal Operation
6.5.6 DAC Non-ideal Operation
6.6 Architectural Design Issues
6.6.1 Integrator Dynamic Range
6.6.2 Dynamic Ranges Optimization
6.6.3 Sampled-data Circuit Implementation
6.6.4 Noise Analysis
……
7. HIGH-ORDER, CT EA CONVERTERS AND EA DAC
8. DIGITAL ENHANCEMENT TECHNIQUES
9. TESTING OF D/A AND A/D CONVERTERS
Index